Fan Out - WLP - Nexlogic

Fan Out – WLP

The redistribution process can also be used to spread or “fan out” the connection points. These chip shrink in size while requiring the same number of contact points thereby reducing the real estate needed on a PCB or substrate. One solution is to fan out the contacts beyond the dimensions of the chip. This solution improves electrical and thermal performance along with a reduction in overall package height and size.

Fan-out wafer-level packaging (FOWLP) typically involves first dicing the front-end-processed wafer into individual die. These dies are then spaced apart on a carrier structure, and the gaps are filled in to form a reconstituted wafer. Once the artificial wafer has been built, the contacts can be redistributed beyond the perimeter of the original die using WLP processing.

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