Ball-Grid Array (BGA) Packages Become PCB Design Mainstream
OEMs demand smaller and diverse packaging options to meet product design challenges and remain cost competitive in their respective markets. Ball-grid array (BGA) packaging has been increasingly popular to meet those design needs. Plus, they are an ideal solution because the I/O connections are on the interior of the device, improving the ratio between pin count and PCB area. Also, BGAs with strong solder balls are stronger than quad flat pack (QFP) leads and are thus more robust.
BGAs provide a PCB design these other advantages:
- Excellent heat dissipation
- Smaller footprint
- Integrated circuit speed advantages
- Requires less expensive surface mount equipment
- Fewer damaged leads
- More leads per unit area
But with those key advantages aside, BGAs pose certain design challenges. Consider that high-pin count, fine-pitch BGAs ranging upwards of 1,052 pins are increasingly being used. This means routing signals becomes more difficult. Thus, precise BGA partitioning on a PCB is a crucial design aspect to minimize or eliminate crosstalk and noise, as well as manufacturing issues.
Correct BGA partitioning first takes into account uniformity of the partitioning, itself. This means evenly distributing power and ground pins on the four quadrants as much as possible. That’s important to evenly route power and ground through the BGA geometry. Fan-outs should also be evenly distributed throughout the BGA periphery, as well to create even routing across the PCB.
On fine pitch BGAs, one trace can be routed between BGA paths, although it is possible to route two traces between BGA pads. However, if a pair of three mil traces are routed between BGA pads, it is difficult to manufacture because controlling the etch on a three mil trace in PCB fabrication is difficult. Also, these traces need to be in parallel to each other because there’s little space between paths.
Placing decoupling capacitors as close as possible to the BGA pads while routing is being performed is another important design technique. This is an effective way to reduce the noise at source instead of carrying it through the board.
Sometimes, there is no other option than to use blind and buried vias, which are expensive to manufacture, although not so difficult to route in the layout phase. Although blind and buried vias are sometimes used in high speed mixed signal designs as a way to reduce noise, they are expensive to fabricate due to additional and complicated fabrication steps.
Memory signals need special consideration during BGA partitioning. They need to be away from oscillating signals and power supply switching. This is important because memory signals needs to be clean. If traces carrying these signals are in the proximity of oscillating signals or switching power supply signals, they produce ripples in the memory signal traces, thereby reducing system speed. The system is operational, but at less than optimal speed levels.
Ground planes need to be clean and close to noise generating components. This is required to suppress the noise by absorbing it into the ground planes. During BGA layout, traces and fan-outs are placed on one side of the PCB, while bypass decoupling capacitors are on the other side. This is especially necessary if the BGA is high pin count because decoupling capacitors need to be placed as close to BGA signal pins as possible, but they need to be on the other side of the PCB due to real estate constraints on the top side.