Make sure your ATE PCB is Ultra Clean - Nexlogic
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The main reason ATE PCBs must be properly and comprehensively cleaned is largely due to the DUT. DUT stands for device under test, which is the circuit area on the ATE PCB where your new µP, SoC, FPGA, or any other valuable semiconductor product is to be tested.

Special care must go toward eliminating any debris, foreign body, fingerprints, hand notions, body perspiration, and other forms of contamination from getting on an ATE board before it goes to the reflow oven. For example, a permanent fingerprint, Fig. 1, may jeopardize the high-speed integrity of the board.

Therefore, DUTs must be treated with extreme care. For example, a tiny piece of solder in the DUT area can be cleaned. Cosmetically it may appear OK. However, in some cases, at the extremely high-speed levels of testing, the DUT may not perform the way it’s intended.

Specifically, let’s say the board is designed for 10 Gigahertz (GHz) speeds. It’s running at peak. However, residue flux or minute contamination remains on the high-speed running traces. That residue is cleaned, but in the cleaning process, trace degradation results due to the cleaning. That trace is such that when testing takes place, the speed being tested may or may not go over 8 to 9 GHz and may not even reach all the way to 10 GHz.

So, it’s critical that you get a full understanding from your ATE PCB assembly house about cleaning processes to assure you get a top quality product.

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