Finer pitch 0.65 millimeter (MM) and below BGA, QFP, and CSP packaging is increasingly being used for leading-edge mPs, DSPs, and FPGAs. OEMs are taking advantage of these newer technology developments by not only requiring more functionality on their PCBs, but shrinking their real estate.
As a result, new PCB design challenges are created. However, in these instances, via-in-pad technology is one way to efficiently use a PCB’s real estate. The catch is it can cause a capillary effect, meaning solder is sucked away from a joint and into the via, resulting in poor solder joints. The solution is to fill the vias with a conductive fill material, usually silver.
Here are some tips and guidelines to follow as your product designs continue to adopt fine pitch device packaging using silver-filled vias:
- At layout and fabrication, have your solder mask recessed about 2-3 mils for finer pitch BGA devices.
- Use extremely fine 5 mil thick or less stencil for silver-filled vias.
- A HASL board finish can pose issues. So it’s best to use immersion gold to achieve a co-planar structure for fine pitch BGAs.
- The combination of immersion gold plating and silver filling is highly thermally and electrically conductive to further alleviate a design from those issues.
- Thanks to silver-filled vias, you can place decoupling capacitors on opposite sides and on top of the vias without fear of encountering a capillary effect.
- Placing decoupling caps directly on top of silver-filled vias contributes to less intrinsic conductance on power pins and also minimizes ground bounce.
Silver-filled vias provide a more direct means for heat conduction. In some cases, they offer more than three times enhancement in thermal conductance. Also, silver-filled vias reduce electrical resistance and improve connectivity. This results in thermal reduction in high current density applications, thus improving the current carrying capacity of a via structure. Consequently, silver-filled via are widely accepted and more reliable than non-conductive vias.