Double Check DFT With Your PCB Assembler - Nexlogic
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Design-for-test or DFT takes into account several major and minor considerations at the design layout stage. The overall DFT success for 90 percent plus test coverage relies heavily on implementing critical design considerations. Here are some tips for having your EMS provider assure DFT success.

  • Initially, the PCB design engineer should lay out all test points on one side of the board.
  • Maintain minimum test point distance from one test point to another. There should be a minimum distance of 100 ml., accounting for about 2.54 millimeters so that probes can perform their job properly.
  • Test point distribution is important. A high density of test points or clusters should be avoided. Test points should be uniformly distributed throughout the board, making it easier to test with multiple probes.
  • There should be a free zone or a safe zone designated as a keep out area.
  • Use standard commercial electronic modules, which are available for testing.
  • Assure accessibility to each address and data and bus line is important.

Nexlogic TestMoreover, the PCB designer must determine whether or not system level feedback loops are de-controllable. Also, while the board is being tested, are all system and subsystem specs made available? Plus, test probe nodes should have access to one test node. Every separate node should have one test point and maybe multiple points.

These are just a few of the many DFT considerations critical for achieving 90 percent plus test coverage on your PCB designs.