In the best of all worlds, you want complete assurances that your PCB project will achieve the highest testing coverage possible – in the neighborhood of 85 to 95 percent. To make this happen and to give you the highest confidence it will happen, both PCB layout and test engineering must be under the same roof and under the same engineering management. Otherwise, you’ll have a big cloud of doubt hanging over your head.

But let’s say PCB layout and test are jointly working together at one design, fab, and test and assembly house. You can rest assured that those two entities constantly interact and devise plans together so that your product is successfully tested. The end result for you is a stable system.

Keep in mind that experienced test engineers know all the nuances associated with in-house test systems. This is valuable knowledge that test engineers and technicians can pass on to in-house layout engineering so it can factor them into their designs.

Get more of an in-depth understanding about the reasons PCB layout and test must be closely linked together by reading our article in this month’s PCD&F/Circuits Assembly Magazine.

For the time being, here are some tips and hints that’ll guide you towards a better understanding of how best to assure yourself that both PCB layout and test engineers are working together to assure higher testability for your PCB project.

		For starters, it’s a great help to you when you learn that the layout engineer on your project is well versed on flying probe and ICT test guidelines and limitations.
		Mini-conferences between layout designer and test engineer are crucial for increasing test coverage.
		The PCB layout engineer should be savvy enough about test-related practices, procedures, and disciplines and fold them into his/her layout strategy.
		Layout and test collaboration are especially crucial for RF applications. Fig. 1 shows a metal shield used to suppress noise and crosstalk. If test and layout is not in sync, test results can send the layout back to the designer for another round.
		High-speed bus calls for special layout emphasis to develop proper test coupons. If not performed properly, timing budgets will be off and those mistakes are caught at functional test. It’s best for layout and test to collaborate on this ahead of time.
		When the PCB layout designer’s eyes don’t glaze over when you ask him/her about smoke test, gain and frequency response test, analog signature analysis, propagation velocity test, and probing techniques, then you’ll know you have a winner.

OEMs not taking advantage of this basic and important practice when mapping out their system designs and manufacturing incur the greatest potential for extra costs, wasted time, and latent field failures. Take for example, an OEM who hands his PCB design to a vendor located in one sector of the country. Then, that OEM gets the electronic data (Gerber files) to the fab house of his choice at another geographic location. Afterward, the OEM goes to the trouble of purchasing components and locating a third party to perform assembly. Each stage – design, fab, and assembly – is distinctly separate from one another and in effect, operates within its own confines with the OEM trying to successfully orchestrate the entire production cycle. In short, it doesn’t make good business sense.