Signal escape routing associated with the highly advanced ball-grid array (BGA) package is definitely not an easy task. Rather it’s highly challenging and poses critical PCB designer decisions along the multitudes of routes involved in getting those signals out. One has to keep in mind that PCBs continue to become smaller, especially those rigid-flex and […]Continue Reading...
Design of experiments or DOEs represent a recent advancement in the continuing challenge for achieving highly reliable medical electronics PCBs. DOEs extend well beyond the extensive nature of a PCB cleaning process. That means DOE practices and procedures focus on investigating and resolving out of the ordinary problems. These are unforeseen and difficult to define […]Continue Reading...
The device-under-test or DUT site or sites is the most critical part of an ATE PCB. That’s where a component or chip is placed for testing. There can be one or more DUTs on a board, for instance, four DUTs as shown in Fig. 1. Others can be a dual-site board with two DUTs where […]Continue Reading...
The main reason ATE PCBs must be properly and comprehensively cleaned is largely due to the DUT. DUT stands for device under test, which is the circuit area on the ATE PCB where your new µP, SoC, FPGA, or any other valuable semiconductor product is to be tested. Special care must go toward eliminating any […]Continue Reading...
RF circuits are designed to pass signals within a certain band. They use band pass filters to transmit signals in a so-called band of interest. The signal within a range of frequency passes through this band range, and the rest of the frequencies of the signal are filtered. A single band can be very narrow […]Continue Reading...
OEMs continue to demand greater functionality in smaller portable and handheld products, such as wearables and IoT devices. As a result, a number of attributes are demanded these days for PCBs in smaller mobile technologies. Along with those attributes come a host of challenges in terms of layout, fabrication, and assembly, plus assuring many of […]Continue Reading...
ATE PCBs can be up to 0.187-inch thick or even 0.25-inch, with a high layer count that includes a number of ground and power planes and have a lot of gold on the surface (typically 50 micro inches, ENIG) on the tester and DUT pads. The size of the board along with the amount of […]Continue Reading...
LEDs are the light of choice for growing numbers of applications due to their shrinking size, as well as declining cost and longer life. But LEDs pose a host of issues to the PCB layout designer including thermal management challenges. Within thermal management, there are a few other key issues to ponder. Those involve PCB […]Continue Reading...
PCB thermal management has long been considered secondary to signal integrity. However, we’re now seeing a greater, more dramatic evolution of power densities in transistors. Consequently, PCB thermal management is today a major issue. The main purpose of thermal management is to drain enough heat away from device’s active region efficiently so that the device […]Continue Reading...
Stencil design and printing is one of the most important steps when it comes to PCB assembly. Knowing how to properly design the stencil and implement paste dispensing for assembly takes considerable knowhow and in-depth experience. In this instance, there’s no substitute for experience since textbooks on the subject are few and far between. Take […]Continue Reading...